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BLE020V1 BLE Module User Manual

 

BLE020V1

Bluetooth Low Energy Module

(Based on CSR1020 A06 chip)

User Manual and Datasheet

V1.3 2018-08-27

Applications

l                      Bluetooth low energy technology: BT 5.0 support

l                      HID: keyboards, mice, touchpads, advanced remote controls with voice activation

l                      Sports and fitness sensors: heart rate, runner/cycle speed and cadence

l                      Health sensors: blood pressure, thermometer and glucose meters

l                      Mobile accessories: watches, proximity tags, alert tags and camera controls

l                      Smart home: sensor/heating/lighting control

l                      Mesh Applications: Support SIG Standard Mesh 1.0

l                      Alibaba TianMao Speaker project

Device Description

l                      Device Name: BLE020V1

l                      Bluetooth® low energy technology single mode SoC with G.722 Audio Codec, Support BT 5.0

l                      16bit RISC MCU, General 4Mb (up to 16Mb) external SPI flash through PIO configuration, 80 KB RAM, 192 KB ROM, 60 KB OTP

l                      15 digital PIOs, 1 analogue AIO, SPI, I²C, I²S, quadrature decoders, 3D shutter/LED PWM modules, key scanner, LCD glass drive, IR encoder, 10bit Aux ADC

l                      Support 5 x PWMs LED control

l                      Ultra low power Bluetooth Low Energy technology radio, V5.0 specification compliant radio

l                      23 leads 20 x 12 x 2 mm, 1.60mm interval stamp bonding pads + 2.00mm interval DIP Pin Header

 

 

Ordering Information:

Device Name: BLE020V1

Ordering Number: BLE020V1 (with Firmware Version)

Package Type: 1.60mm interval stamp bonding pads + 2.00mm interval DIP Pin Header

Package Size: 23 leads 20 x 12 x 2 mm

 

 

INDEX

Ordering Information:        

1 General Description:        

2 Device Details:        

3 BLE020V1 module Functional Block Diagram        

4 BLE020V1 Module Size and Pins Definitions        

4.1 Module Size        

4.2 Module Pins Definitions        

5 Operating Mods-Power Dissipation Relates        

5.1 Active        

5.2 Radio-On        

5.3 Deep Sleep 30: 16 KB Data RAM and 64 KB RAM Retention        

5.4 Deep Sleep 20: 16 KB Data RAM Retention        

5.5 Deep Sleep 10: No RAM Retention and External Interrupts and Timer Enabled        

5.6 Deep Sleep 00: No RAM Retention and External Interrupts Enabled        

6 I²C Master / Slave (General)        

7 SPI Master / Slave (General)        

8 SPI Debug Interface        

9 UART (General)        

9.1 UART Configuration Settings        

9.2 UART Configuration while in Deep Sleep        

10 PWMs        

10.1 3D Shutter Control PWM        

10.2 LED Control PWM        

11 LCD Glass Driver        

12 Key Scanner        

13 Quadrature Decoders        

14 Infrared Output        

15 Audio        

15.1 Digital Microphone        

15.2 G.722 Codec        

16 10-Bits Aux ADC        

17 Auxiliary Features        

17.1 Battery Monitor        

17.2 Temperature Sensor        

18 Programable I/Os, PIO and AIO        

18.1 PIO        

18.2 AIO        

18.3 PIO on initial Power Up        

18.4 LCD Glass Mid-Rail Driver        

18.5 Analogue Properties of the PIO        

19 Power Control and Regulation        

19.1 Switch-mod Regulator        

19.2 Reset        

20        BLE020V1 module Example Application Schematic        

21 Electrical Characters        

21.1 Absolute Maximum Ratings        

21.2 Recommend Operating Conditions        

21.3 Input/Output Terminal Characteristics        

21.3.1 Switch-mode Regulator        

21.3.2 RF Liner Regulator        

21.3.3 Digital I/O Terminals        

21.3.4 AIO        

21.4 ESD Protection        

22        Current Consumption        

22.1 Theoretical peak power consumption        

23 Reference SMT Temperature Monitoring        

23.1 Reflow        

24 Terms and Definitions        

24 Document History        

 

1 General Description: 

BLE020V1 is a Bluetooth Low Energy technology single mode platform module with ultra-low power consumption. it is based on Qualcomm CSR1020 A06 chip.

Qualcomm® uEnergy™ technology enables ultra-low power connectivity and basic data transfer for applications previously limited by the power consumption, size constraints and complexity of other wireless standards. The uEnergy platform provides everything required to create a Bluetooth low energy technology product with RF, baseband, MCU, qualified Bluetooth v5.0 specification stack and customer applications, for health and fitness sensors, watches, keyboards, mice and advanced remote controls.

BLE020V1 module enables connectivity and data transfer to leading smartphone, tablet and personal computing devices including iOS, Android, Windows, Windows Phone and Blackberry OS devices.

BLE020V1 module supports Qualcomm® Mesh. It places the smartphone at the center of the Internet of Things allowing an almost unlimited number of Bluetooth low energy technology enabled devices to be simply networked together and controlled directly from a single smartphone, tablet or PC.

Based on Qualcomm Mesh, BLE020V1 module support SIG Standard Mesh 1.0

BLE020V1 module meet the requirements of Directive 2011/65/EU of the European Parliament and of the Council on the Restriction of Hazardous Substance (RoHS).

l                      Single pin RF connection (50 impedance in TX and RX modes)

l                      Requires no external RF components (Certain antennas with gain may require a simple filter)

l                      Bluetooth v5.0 specification compliant

Bluetooth Transmitter

l                      4 dBm RF transmit power

l                      TX power control

l                      Customize to allow external power amplifier or TX / RX switch required

Bluetooth Receiver

l                      -90 dBm sensitivity

l                      -91.5 dBm RX Boost mode available: Enhances RX sensitivity at higher receive current cost

l                      Integrated channel filters

l                      Digital demodulator for improved sensitivity and co-channel rejection

l                      Fast AGC for enhanced dynamic range

Bluetooth Stack

l                      Support for Bluetooth v5.0 specification features:

n                      Master and Slave operation

n                      Including encryption

l                      Software stack in firmware includes:

n                      GAP

n                      L2CAP

n                      Security manager

n                      Generic attribute protocol

n                      Attribute profile

n                      Bluetooth low energy technology profile support

Baseband and Software

l                      Integrated MAC for all packet types enables packet handling without the need to involve the MCU

Audio

l                      Digital microphone input

l                      I²S port for PCM I/O

l                      G.722 Codec

Ultra-Low Power Bluetooth Low Energy Technology Radio

Physical Interfaces

l                      11 digital flexible PIOs (including UART RX&TX)

l                      4 digital multi-function PIOs with SPI reuse

l                      1 analogue AIO (as 3 PIOs with voltage divider)

l                      UART RX&TX (2 digital flexible PIOs)

l                      SPI master interface (4 digital multi-function)

l                      I²C master controller (digital flexible PIOs)

l                      4 x quadrature decoders

l                      PWM 3D shutter control

l                      5 x LED PWMs

l                      Keyboard scanner

l                      LCD glass drive

l                      10-bit Aux ADC

l                      IR encoder

Auxiliary Features

l                      Battery monitor

l                      6 power modes

l                      Power management features include software shutdown and hardware wake-up

l                      Wake-up power management from any PIO

l                      Integrated switch-mode power supply

l                      Linear regulator (internal use only)

l                      AES-128

l                      Watchdog timer

Memory

l                      General 4Mb (up to 16Mb) external SPI flash through PIO configuration 

l                      64 KB (Code) and 16 KB (Data) RAM

l                      192 KB ROM

l                      60 KB OTP

l                      256 Byte MTP

Working Voltage

l                      Battery input voltage 3.6 V to 1.4 V

Temperature Specification

l                      Standard Operating temperature: -30 to 85 ºC

l                      Extend Operating temperature: -30 to 105 ºC

l                      Storage temperature: -40 to 150 ºC

Package

l                      23 leads, 20 x 12 x 2 mm, 1.60mm interval stamp bonding pads + 2.00mm interval DIP Pin Header

l                      Single side routing pinout optimized

2 Device Details:

3 BLE020V1 module Functional Block Diagram

img1

4 BLE020V1 Module Size and Pins Definitions

4.1 Module Size

img2

4.2 Module Pins Definitions 

img3

 

Pin#

Pad

Pad Type

Definitions

Remark

1

AIO0

Unidirectional analogue

Analogue programmable input line

 

2

SPI-SEL

Input with strong internal pull-down

Selects Debug SPI

 

3

CLK

Debug_SPI_PIO

General programmable I/O line 0

 

4

CSB

Debug_SPI_PIO

General programmable I/O line 1

 

5

MOSI

Debug_SPI_PIO

General programmable I/O line 2

 

6

MISO

Debug_SPI_PIO

General programmable I/O line 3

 

7

GND

VSS

Ground connections

GND

8

PIO8

UART-TX

Digital: Bidirectional with programmable strength internal pull-up / pull-down and LCD glass driving capability

General programmable I/O line 9

Transmit UART data to another device

Supply Domain: VDD_PADS

9

PIO9

UART-RX

Digital: Bidirectional with programmable strength internal pull-up / pull-down and LCD glass driving capability

General programmable I/O line 9

Receive UART data from another device

Supply Domain: VDD_PADS

10

PIO10

Digital: Bidirectional with programmable strength internal pull-up / pull-down and LCD glass driving capability

General programmable I/O line 10

Supply Domain: VDD_PADS

11

PIO11

Digital: Bidirectional with programmable strength internal pull-up / pull-down and LCD glass driving capability

General programmable I/O line 11

Supply Domain: VDD_PADS

12

GND

VSS

Ground connections

GND

13

VBAT

VCC

Positive supply from the battery

 

14

VDD-PADS

VDD

Positive supply for PIO and SPI_PIO

 

15

PIO14

Digital: Bidirectional with programmable strength internal pull-up / pull-down and LCD glass driving capability

General programmable I/O line 14

Supply Domain: VDD_PADS

16

PIO12

Digital: Bidirectional with programmable strength internal pull-up / pull-down and LCD glass driving capability

General programmable I/O line 12

Supply Domain: VDD_PADS

17

PIO13

Digital: Bidirectional with programmable strength internal pull-up / pull-down and LCD glass driving capability

General programmable I/O line 13

Supply Domain: VDD_PADS

18

GND

VSS

Ground connections

GND

19

GND

VSS

Ground connections

GND

20

GND

VSS

Ground connections

GND

21

GND

VSS

Ground connections.

 

22

RF

Antenna port for Bluetooth transmitter / receiver

 

 

23

GND

VSS

Ground connections.

 

5 Operating Mods-Power Dissipation Relates

BLE020V1 module has 6 operating modes. 4 are Deep Sleep modes

Active

Radio-On

Deep Sleep 30: 16 KB Data RAM and 64 KB RAM Retention

Deep Sleep 20: 16 KB Data RAM Retention

Deep Sleep 10: No RAM Retention and External Interrupts and Timer Enabled

Deep Sleep 00: No RAM Retention and External Interrupts Enabled

5.1 Active

In Active mode, the processor runs:

l                      Code and/or performs activities with peripherals.

l                      With at least 1 link controller powered.

5.2 Radio-On

In Radio-On mode, the Bluetooth radio is turned on.

NOTE: Radio-On mode can only be entered from Active mode.

5.3 Deep Sleep 30: 16 KB Data RAM and 64 KB RAM Retention

In Deep Sleep: 16 KB Data RAM and 64 KB RAM Retention mode:

l                      Normal operation uses only the slow clock or intermediate clock (running at a slow speed).

l                      BLE020V1 supports activity in peripherals to perform a particular operation (e.g. PWMs, keyboard scanner) or wake the chip on activity (e.g. UART, application SPI).

l                      Link controller state is maintained: this can be active (advertising, scanning or in a connection) and BLE020V1 can deep sleep between periods on or around radio activity.

l                      A PIO deep sleep timer time-out or optional temperature change or low battery can wake the chip by generating an interrupt.

l                      It is possible to keep the processor powered and its power controlled using power gating.

5.4 Deep Sleep 20: 16 KB Data RAM Retention

In Deep Sleep: 16 KB Data RAM Retention mode:

l                      Normal operation uses only the slow clock or intermediate clock (running at a slow speed).

l                      BLE020V1 supports activity in peripherals to perform a particular operation (e.g. PWMs, keyboard scanner) or wake the chip on activity (e.g. UART, application SPI).

l                      Link controller state is maintained: this can be active (advertising, scanning or in a connection) and BLE020V1 can deep sleep between periods on or around radio activity.

l                      A PIO deep sleep timer time-out or optional temperature change or low battery can wake the chip by generating an interrupt.

l                      It is possible to keep the processor powered and its power controlled using power gating.

5.5 Deep Sleep 10: No RAM Retention and External Interrupts and Timer Enabled

In Deep Sleep: No RAM Retention and External Interrupts and Timer Enabled mode:

l                      VDD_BAT must always be present.

l                      A PIO can wake the chip (programmable as in Deep Sleep: No RAM Retention and External Interrupts Enabled mode).

l                      The following can wake BLE020V1 module:

n                      PIO hibernate timer time-out.

n                      Temperature change.

n                      Low battery.

5.6 Deep Sleep 00: No RAM Retention and External Interrupts Enabled

In Deep Sleep: No RAM Retention and External Interrupts Enabled mode:

l                      An attached battery can be used as a wakeup.

l                      No timers run, therefore BLE020V1 module can only be woken by a PIO or a rise on VDD_BAT.

l                      VDD_BAT can be removed if VDD_PADS remain powered, because the pull states of pads are preserved.

l                      Ignore a rise on VDD_BAT until a PIO has latched an event (enabling 2 different Deep Sleep: No RAM Retention and External Interrupts Enabled modes).

l                      The PIOs that BLE020V1 module is sensitive to on wakeup are programmable, i.e. it is possible to ignore events on some PIOs but not others

6 C Master / Slave (General)

BLE020V1 has 1 I²C master/slave general interface for communication with external peripherals and sensors:

l                      Maximum clock speed 1 MHz

l                      Data transmitting/receiving of variable byte length 7-bit and 10-bit addressing modes

l                      Configurable:

n                      PIO pins for SCL and SDA

n                      C clock: 100 kHz default (software-configurable) at 1:1 duty-cycle (asymmetric if required)

n                      Supports slave clock stretching

n                      BLE020V1 is Fast Mode and Fast Mode+ compatible.

NOTE: Strong pull is sufficient for I²C on all PIO pads.

7 SPI Master / Slave (General)

BLE020V1 has 1 SPI master/slave general interface for communication with other devices.

It supports:

l                      SPI master and slave

l                      All 4 modes supported

l                      2 methods of transferring data to memory:

n                      DMA to/from memory:

u                      8-bit or 16-bit word size

u                      Big and little-endian

n                      Software reads and writes to FIFOs: variable from 1 to 16 bits

l                      Interrupt callbacks to processor allow SPI as a slave to indicate that it requires service

l                      Deep sleep mode (depending on clock)

 

 

SPI Timing Diagram

img4

8 SPI Debug Interface 

BLE020V1 module uses a 16-bit data and 16-bit address programming and debug interface. Transactions occur when

the internal processor is running or is stopped.

SPI Debug Interface is only for the firmware developers use.

9 UART (General)

BLE020V1 module's UART interface provides a simple mechanism to communicate with other serial devices using the RS232 protocol.

UART Signals

Signal

Description

UART_RX

Pin to receive UART data from another device

UART_TX

Pin to transmit UART data to another device

UART_CTS

Pin to notify another device BLE020V1  is ready to receive data (active low input)

UART_RTS

Pin to notify other device BLE020V1  is ready to send data (active low output)

9.1 UART Configuration Settings

UART configuration parameters, e.g. baud rate and data format, are set using BLE020V1  firmware.

NOTE To communicate with the UART at its maximum data rate using a standard PC, the PC requires an accelerated serial port adapter card.

UART Configuration Settings

Parameter

Possible Values

Baud rate Minimum

1200 baud (≤2 % Error)

Baud rate Minimum

9600 baud (≤1 % Error)

Baud rate Maximum (XTAL)

1M baud (≤1 % Error)

Parity

None, Odd or Even

Number of stop bits

1 or 2

Bits per byte

8

9.2 UART Configuration while in Deep Sleep

The maximum baud rate is 2400 baud during deep sleep.

10 PWMs

BLE020V1 has 5 independently configurable PWM instances.

A multipurpose PWM generator provides 3 modes:

l                      Normal PWM mode:

n                      For motor control and general purpose PWM

l                      3D Shutter mode:

n                      For 3D shutter control

n                      Cycle accurate

n                      16-bit resolution for all the configuration registers to be specified in clock cycles

n                      New configuration applied on update register write or at a specific time (e.g. in response to radio traffic)

n                      Variable offset after the reconfiguration can be applied

n                      Configurable width of the external sync pulses

l                      LED mode:

n                      For LED fading

10.1 3D Shutter Control PWM

To be advice later

10.2 LED Control PWM

BLE020V1 has 4 LED mode PWM blocks (2 x fast / 2 x slow). Each LED mode PWM has an 8-bit resolution for all configuration registers and a:

l                      Minimum brightness duty cycle (grouped in a 16-bit wide register)

l                      Maximum brightness duty cycle (grouped in a 6-bit wide register)

l                      Hold Minimum and Maximum time (grouped in a 16-bit wide register)

l                      Step (ramp) time

l                      Brightness configuration specified in units of typically 30 µs assuming a 32 kHz clock

l                      Hold times specified in units of typically 16 ms assuming a 32 kHz clock

l                      Step time specified in units of typically 1 ms assuming a 32 kHz clock

NOTE: BLE020 supports immediate reconfiguration on the sync register write.

11 LCD Glass Driver

BLE020V1's LCD driver has the following features:

l                      Drives simple static and multiplexed LCD glass with no requirement for external components.

l                      Capable of controlling PIO pads to support bias modes:

n                      Normal: Switching between GND and VCC

n                      1/2 bias: Switching between GND, 1/2 VCC and VCC

n                      1/3 bias: Switching between GND, 1/3 VCC, 2/3 VCC and VCC

l                      Up to 28 segments and 4 common (backplane) driver outputs

l                      Configurable to support non-multiplexed (static) and 2, 3 or 4way multiplexed LCD glass

l                      Supports LCD glass with up to 112 display segments (4x the number of segment driver outputs)

NOTE: Unused segment outputs that can be disabled.

l                      LCD blanking support: Enables flashing of all segments at slow (typically 2 Hz) frequency

l                      LCD segment blinking support: Up to 2 segments can be configured to blink at slow frequency (typically 2 Hz)

l                      Flexible input clock pre􀏣scaler to support required clock frequencies for different multiplexing modes and LCD glass characteristics.

l                      Ultra-low power operation to maintain LCD display with only low frequency clock input (typically 32 kHz)

l                      LCD clock output for pad drivers to increase output pad drivers when LCD output changes.

l                      Contrast control

12 Key Scanner

BLE020V1 has 1 key scanner for applications such as mouse and keyboard HID.

Physical buttons are located on line crossings A to F. If a button is pressed both lines become connected. Assuming sense lines are pulled-up by internal logic, a key press, for example C can be detected by forcing PIO[OUT1] lowand reading 0 on PIO [IN 0].

It supports:

l                      Keypad matrix up to 12 PIO inputs (sense lines) and 18 PIO outputs (drive lines):

n                      Drives 1 to 18 drive lines consecutively12􀏣bit key registers updated every scan

n                      Press and release events reported to the host via callback

l                      Variable scan rate:

n                      By default, drives consecutive drive lines every clock cycle

n                      Configurable number of clocks per drive line

NOTE: The key scanner does not support ghost key removal.

The key scanner configuration and control includes:

l                      PIO pin numbers to be used for drive and sense lines

l                      Scan rate, Hz and active/idle ratio Hardware starting and stopping

l                      Callback creation to receive keyboard map data.

13 Quadrature Decoders

BLE020V1 module has 4 quadrature decoders with:

l                      Each having a configurable simple filter on inputs (for debouncing)

l                      Enabling and disabling of single or multiple decoders

l                      Data reading functionality

l                      Processor interrupt generation

14 Infrared Output

BLE020V1 module has 1 IR output for applications such as infrared remote control. It can run from Fast XTAL and Intermediate clocks.

15 Audio

NOTE: Digital microphone and I²S input cannot be active at the same time. G.722 codec cannot encode and decode at the same time.

15.1 Digital Microphone

BLE020V1 module has 1 digital microphone input with:

l                      1 or 2 Mbps sample rate

l                      Software selectable as left or right channel

l                      G.722 encoder or bypass option

l                      Audio routed to firmware only (not to I²S)

l                      Software supporting DMIC clock frequencies of 500 kHz, 1 MHz, 2 MHz, and 4 MHz

15.2 G.722 Codec

BLE020V1 module has a G.722 Codec, featuring:

l                      Output: 48 kbps (optional 56 or 64 kbps)

l                      Input: 16 kHz/16􀏣bits (optional 8 kHz/8-bits, 8 kHz/16-bits and 16 kHz/8-bits)

l                      Output produces 20 Byte blocks for easy GATT streaming

NOTE: Analogue audio is not provided.

16 10-Bits Aux ADC

BLE020V1 module has 1 10-bit Aux ADC:

l                      A resistive SAR ADC

l                      Attached to 1 AIO pad

l                      The processor has access to its ADC result value after exit from Deep Sleep mode

NOTE: The 10-bit Aux ADC is not available during XTAL startup or battery voltage and temperature monitoring. Therefore, the time to perform a conversion may be longer if the hardware is already using the ADC.

17 Auxiliary Features

17.1 Battery Monitor 

BLE020V1 module contains an internal battery monitor that reports the battery voltage to the software.

17.2 Temperature Sensor

BLE020V1 module contains a temperature sensor that measures the temperature of the die and can report the chip temperature in °C or Kelvin using a firmware API.

BLE020V1 module could report the temperature of CSR1024 chip through the UART or BLE interface.

NOTE: This feature may not be available in the current firmware.

18 Programable I/Os, PIO and AIO

18.1 PIO

15 lines of programmable bidirectional I/O are provided:

l                      May be set by the application code or used as an input or to wake the chip.

l                      Software-configurable as weak pull-up, weak pull-down, strong pull-up or strong pull-down.

l                      At reset all lines are inputs with weak pull-down.

l                      Pull strength, direction and pad states preserved across all non-off states to support waking on any PIO (even when VDD_DIG is powered down). Configurable to wake BLE020V1 module via an individually selectable mask for rising, falling or any edge transition from Deep Sleep modes.

l                      Available as interrupt request lines.

l                      Powered from VDD_PADS

NOTE: VDD_PADS must remain powered.

QTIL cannot guarantee that the PIO assignments remain as described. Implementation of the PIO lines is firmware build-specific, for more information see the relevant software release note.

18.2 AIO

BLE020V1 module has 1 pin providing a unidirectional analogue programmable input line, AIO[0].

NOTE: This pin does not provide an output capability.

18.3 PIO on initial Power Up

Pull-Up and Pull-Down default to weak values unless specified otherwise.

Pin Name / Group

On Initial Power Up

SPI_PIO#

Strong Pull-Down

All other PIOs

Weak Pull-Down

18.4 LCD Glass Mid-Rail Driver

BLE020V1 supports direct LCD glass driving by internally generating required voltage for one of the following modes of operation:

1/2 mode

1/3 and 2/3 mode

Voltage levels are generated and routed internally to the I/O pads configured for LCD glass driving.

NOTE: Only a single mode of operation is available.

18.5 Analogue Properties of the PIO

Most BLE020V1 module PIOs can route in an analogue signal that can be digitized using the 10-bit Aux ADC.

NOTE: This feature may not be available in the current firmware.

19 Power Control and Regulation

BLE020V1 module contains a switch-mode regulator that generates all the supply rails required from the battery.

19.1 Switch-mod Regulator

The switch-mode regulator generates the main rail from the battery supply, VDD_BAT.

The switch-mode regulator generates all required voltage rails for the system to operate using only a single inductor.

No user intervention is required because the regulator automatically changes from buck to boost mode depending on the battery voltage and output voltage of the rail(s).

19.2 Reset

BLE020V1 module is reset by:

l                      Power-on reset

l                      Software-configured watchdog timer

l                      Command through UART interface from other MCU or control devices

l                      Command through BLE interface from Smartphone devices or other BLE devices

NOTE:

VDD_BAT input voltage must drop to 0.4 V to guarantee a rising VDD_BAT is seen by the PMU on reassertion.

VDD_BAT takes approximately 20 s to drop to 0 V when power is removed due to circuit decoupling capacitance.

To fully reset the PIO pads take all VDD_PADS pins below 0.4 V.

20                       BLE020V1 module Example Application Schematic

img5

 

img6

 

img7

 

img8 

 

img9

 

img10

 

img11

21 Electrical Characters

21.1 Absolute Maximum Ratings

Rating

Min

Typ 

Max

Unit

Storage temperature

-40

 

85

 °C

Battery (VDD_BAT and VDD_PADS)

0

 

3.6

V

I/O supply voltage

0

 

3.6

V

I/O supply (VDD_PADS) total current

 

 

30

mA

VDD_AUX, VDD_DIG, AIOs

0

 

1.26

V

21.2 Recommend Operating Conditions

Operating condition

Min

Typ

Max

Unit

Operating temperature range

-30

20

85

°C

Battery (VDD_BAT)

1.4

3

3.6

V

I/O supply voltage (VDD_PADS)

1.4

3

3.6

V

21.3 Input/Output Terminal Characteristics

Always comply with the stated values when attaching external components to BLE020V1 .

NOTE Current drawn by a pin is positive (+ve), current supplied is negative (-ve).

21.3.1 Switch-mode Regulator

Switch-mode Regulator

Min

Typ

Max

Unit

Output voltage (VDD_AUX)(1)

-

1.2

-

V

Output voltage (VDD_DIG)(1)

-

1.1

-

V

Output voltage (VDD_RAD)(1)

-

1.8

-

V

Output voltage (VDD_MEM)(1)

-

3.3

-

V

NOTE 1. These are internal regulators and should have no additional load connected.

21.3.2 RF Liner Regulator

Normal Operation

Min

Typ

Max

Unit

Input voltage (VDD_RF_IN)

1.2

-

2.2

V

Output voltage (VDD_RF)

1.0

-

2.0

V

NOTE This regulator is for QTIL internal use only of the RF rail.

21.3.3 Digital I/O Terminals

Input Voltage Levels

Input Voltage Levels

Min

Typ

Max

Unit

VIL input logic level low

-

-

25% x VDD_PADS

V

VIH input logic level high

75% x VDD_PADS

-

-

V

 

 

 

 

 

Output Voltage Levels

Output Voltage Levels

Min

Typ

Max

Unit

VOL output logic level low, IOL = 8.0 mA
(Max Drive Strength)

-

-

20% x VDD_PADS

V

VOH output logic level high, IOL = -8.0 mA
(Max Drive Strength)

80% x VDD_PADS

-

-

V

Tr/Tf (for 30 pF load)

-

-

2

ns

 

 

 

 

 

Input and Tristate

Input and Tristate

Min

Typ

Max

Unit

With strong pull-up

3.5

4.7

6.0

kΩ

With strong pull-down

3.5

4.7

6.0

kΩ

With weak pull-up(1)

8

40

50

µA

With weak pull-down(1)

10

40

50

µA

CI input capacitance

-

5

-

pF

NOTE 1. Range applicable for VDD_PADS between 1.8 V and 3.3 V when measured as a short circuit.

21.3.4 AIO

Input/Output Voltage Levels

Min

Typ

Max

Unit

Input voltage

0

-

VDD_AUX

V

21.3.4.1 10-Bits AUX ADC

10-bit Aux ADC

Min

Typ

Max

Unit

Resolution

-

-

10

Bits

Input voltage range(1)

0

-

VDD_AUX

V

Input bandwidth

-

100

-

kHz

Conversion time

1.38

1.69

4.14

µs

Sample rate(2)

-

-

700

Samples/s

NOTE

1. LSB size = VDD_AUX/1023.

2. The 10-bit Aux ADC is accessed through the firmware API. The sample rate given is achieved as part of this function.

21.4 ESD Protection

Apply ESD static handling precautions during manufacturing.

Condition

Class

Max Rating

Human Body Model Contact Discharge per JEDEC EIA /JS-001-2014

1C

2 kV (all pins except RF rated at 1 kV) (1)

Charged Device Model Contact Discharge per JEDEC EIA /JS002-2014

C1

500 V (all pins) (1)

NOTE 1. This value is preliminary and may be subject to change.

22                       Current Consumption

22.1 Theoretical peak power consumption

Mode

Description

Total Typical Current at 3 V

Deep Sleep: No RAM Retention and External Interrupts Enabled

All functions are shut down.

To wake the chip, toggle a pre-configured PIO.

1.6-2 µA

Deep Sleep: No RAM Retention with External Interrupts and Timer Enabled

VDD_PADS = ON

VDD_BAT = ON

5.5 µA

Deep Sleep: 16 KB Data RAM Retention

VDD_PADS = ON

VDD_BAT = ON

RAM = ON

Digital Circuits = ON

SMPS = ON

10.5 µA

Deep Sleep: 16 KB Data RAM and 64 KB RAM Retention

VDD_PADS = ON

VDD_BAT = ON

RAM = ON

Digital Circuits = ON

SMPS = ON

12 µA

Idle: Shallow Sleep

VDD_PADS = ON

VDD_BAT = ON

RAM = ON

Digital Circuits = ON

MCU = IDLE

<1µs Wake-up Time

0.75 mA

Idle: Active

VDD_PADS = ON

VDD_BAT = ON

RAM = ON

Digital Circuits = ON

MCU = IDLE

<1µs Wake-up Time

1.3 mA (Execution from Cache)

 

TX Active

4 dBm Transmit Power

5 mA Average

 

 

 

23 Reference SMT Temperature Monitoring

Pre-heat
150-190°C

Pre-heat
190-220°C

Peak temp

Time above
220°C

55 s

25 s

235-240°C

45 s

img12

23.1 Reflow

Soak time (150–190°C): 60–70 s (Solder paste dependent) Ramp time (190–220°C): 20–25 s

Peak temperature (minimum 245°C): Temperature measured on body of part

Time above liquidus: 45–70 s

The use of Nitrogen is recommended to assist solder wetting

img13

A. Ensure that the soak and ramp times are not excessively long, or the solder balls may re-oxidize before liquidus and result in non-wets between the PCB and the package.

l                      This area should be the focus of the SMT process of non-PoP and pre-stacked PoP assembly

B. Ensure the ramp time and time above liquidus (TAL) are sufficiently long enough to wet the solder joints between the MSM device and memory.

l                      This area should be the focus for the pre-stack reflow process

img14

24 Terms and Definitions

Term

Definition

ADC

Analogue to Digital Converter

AES

Advanced Encryption Standard

AGC

Automatic Gain Control

AIO

Analogue Input/Output

ATT

ATTribute protocol

B

Byte

Bluetooth®

Set of technologies providing audio and data transfer over shortョrange radio connections

Qualcomm® BlueCore

Group term for QTILs range of Bluetooth wireless technology ICs

codec

Coder decoder

CSR™

Cambridge Silicon Radio

dBm

Decibels relative to 1mW

EIA

Electronic Industries Alliance

ESD

Electrostatic Discharge

GAP

Generic Access Profile

GATT

Generic ATTribute protocol

GSM

Global System for Mobile communications

HID

Human Interface Device

I²C

Inter-Integrated Circuit Interface

I²S

Inter-Integrated Circuit Sound

I/O

Input/Output

IC

Integrated Circuit

IF

Intermediate Frequency

IPC

See www.ipc.org

JEDEC

Joint Electron Device Engineering Council (now the JEDEC Solid State Technology Association)

KB

Kilobyte

L2CAP

Logical Link Control and Adaptation Protocol

LCD

Liquid-Crystal Display

LDO

Low (voltage) Drop-Out

LED

Light-Emitting Diode

LGA

Land Grid Array

LNA

Low Noise Amplifier

MAC

Medium Access Control

MCU

MicroController Unit

MISO

Master In Slave Out

MOSI

Master Out Slave In

MTP

Multiple-Time Programmable

NC

Not Connected or No Connection

NSMD

Non-Solder Mask Defined

NVM

Non-Volatile Memory

OTP

One-Time Programmable

PA

Power Amplifier

PC

Personal Computer

PCB

Printed Circuit Board

PCM

Pulse Code Modulation

PIO

Programmable Input/Output, also known as general purpose I/O

PMU

Power Management Unit

ppm

parts per million

PWM

Pulse Width Modulation

QTIL

Qualcomm Technologies International, Ltd.

RAM

Random Access Memory

RF

Radio Frequency

RISC

Reduced Instruction Set Computer

RoHS

Restriction of Hazardous Substances in Electrical and Electronic Equipment Directive (2002/95/EC)

ROM

Read Only Memory

RSSI

Received Signal Strength Indication

RX

Receive or Receiver

SDK

Software Development Kit

SMPS

Switch-Mode Power Supply

SPI

Serial Peripheral Interface

TX

Transmit or Transmitter

UART

Universal Asynchronous Receiver Transmitter

VCO

Voltage Controlled Oscillator

W-CDMA

Wideband Code Division Multiple Access

24 Document History

Revision

Date

Change Reasons

1.0

2017-01-06

Original First Release

1.1

2017-04-11

Add 1.60mm interval DIP Pin Header

1.2

2018-06-14

Update ANT pin contactors

Change a GND pin to a general PIO

Update CSR1020 from A05 to A06

Support BT 5.0

Update Example Application Schematic in Chinese

Update Power Consumptions

1.3

2018-08-27

Update Reference SMT Temperature Monitoring

 

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